Dependable Computing - EDCC-1

A model for adaptive fault-tolerant systems.- Designing secure and reliable applications using fragmentation-redundancy-scattering: an object-oriented approach.- A fault-tolerant mechanism for simple controllers.- Formal semantics for Ward & Mellor's transformation schemas and the specification of fault-tolerant systems.- Formal reasoning on fault coverage of fault tolerant techniques: A case study.- On performability modeling and evaluation of software fault tolerance structures.- Optimal design of fault-tolerant soft-real-time systems with imprecise computations.- Computational restrictions for SPN with generally distributed transition times.- Test generation for digital systems based on alternative graphs.- The Configuration Ratio: A model for simulating CMOS intra-gate bridge with variable logic thresholds.- Coverage of delay faults: When 13% and 99% mean the same.- RIFLE: A general purpose pin-level fault injector.- On single event upset error manifestation.- Injecting faults into environment simulators for testing safety critical software.- On statistical structural testing of synchronous data flow programs.- Hierarchical test analysis of VLSI circuits for random BIST.- Zero aliasing compression based on groups of weakly independent outputs in circuits with high complexity for two fault models.- Systematic and design diversity — Software techniques for hardware fault detection.- Detection of permanent hardware faults of a floating point adder by pseudoduplication.- MLDD(Multi-Layered Design Diversity) architecture for achieving high design fault tolerance capabilities.- Reconfiguration and checkpointing in massively parallel systems.- An approach for hierarchical system level diagnosis of massively parallel computers combined with a simulation-based method for dependability analysis.- Hierarchical checking of multiprocessors using watchdog processors.- Dependability: The challenge for the future of computing and communication technologies.- Position paper.- Position paper.- Position paper.- Some lessons from the SW2000 workshop.- Dependable computing and its industrial use.- An effective reconfiguration process for fault-tolerant VLSI/WSI array processors.- Concurrent error detection in fast FNT networks.- Feasible regions quantify the configuration power of arrays with multiple fault types.- Software reliability analysis of three successive generations of a Switching System.- Performance of consistent checkpointing in a modular operating system: Results of the FTM experiment.- Ring-banyan network: A fault tolerant multistage interconnection network and its fault diagnosis.- Reconfiguration of faulty hypercubes.- Fault-tolerance on boolean n-cube architectures.- Relative signatures for fault tolerance and their implementation.- GatoStar: A fault tolerant load sharing facility for parallel applications.- A hierarchical membership protocol for synchronous distributed systems.